The IC6.1.7 ISR18 and ICADV12.3 ISR18 production releases are now available for download. To find out more, click here…(read more)![]()
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Virtuoso IC6.1.7 ISR18 and ICADV12.3 ISR18 Now Available
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Virtuosity: What if I Want to Disable the Filtered Corners?
You'll now be an expert at using the Corner Filters in Virtuoso ADE Assembler and Virtuoso ADE Explorer, I'm sure. But so far, you could only enable the corners you found during filtering. Now, we can offer even more flexibility. You can now disable the corners you find using the filters, and also incrementally enable or disable the filtered corners.(read more)![]()
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Virtuoso Video Diary: Reusing Variables through CSV Export and Import
Do you have some specific variables in a test and wonder if you could have a way to reuse them globally for all tests or locally in a particular test? You will be glad to know that Virtuoso ADE Assembler and Virtuoso ADE Explorer offer you a simple and time-saving solution to perform this task. You can now export variables in a CSV file and then use the same file to import them as global or local variables in any session.(read more)![]()
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Virtuosity: Working with Tests in Virtuoso ADE Assembler Made Smarter
Don’t we love the new features that make our favorite products behave even more cool?
At times, small, but smart UX enhancements give us a better experience. Be it a simpler way to change the phone settings, a new banking menu to add multiple beneficiaries in one go, or a location sensor added to a cab-booking or food-ordering app, all of us welcome such simple design innovations that make our tasks easier and quicker.
At Cadence, we understand that user experience is an important factor for the success of a product, so we continually strive to make it better. Here, I introduce you to two new features in Virtuoso ADE Assembler that will improve your interactions with tests.(read more)![]()
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Virtuosity:Expression Builder - Now Plots ALL!
The Expression Builder has simplified writing complex expressions and has the ability to plot or evaluate particular points and corners. But we wanted it to do more, recently we added the ability to plot or evaluate across all points and/or all corners. (read more)![]()
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Virtuosity: What's New in Run plan – Part I
The Run Plan assistant in Virtuoso ADE Assembler has proved to be one of the most popular features. It provides the capability to create multiple variations of the setup within a single session, each of these runs has their own setup details that override the settings in the active setup. Simulations can be run for all the runs defined in the run plan with a single click. If there are no dependencies, the results are generated simultaneously.
The different runs in the run plans can vary in terms of tests, analyses, simulation options, variables, corners or they can even run different run modes. Let us see the enhancements that have been made to run plan in IC6.1.7 ISR15 and ICADV12.3 ISR15 releases.(read more)![]()
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Virtuoso IC6.1.7 ISR19 and ICADV12.3 ISR19 Now Available
The IC6.1.7 ISR19 and ICADV12.3 ISR19 production releases are now available for download. To find out more, click here…(read more)![]()
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Virtuosity: Use Colin Thomson's New RAK to Learn How Legacy Designs Can be Made XL-Compliant
Are you bringing in a Layout L design, or a design made outside of Virtuoso into Virtuoso Layout Suite XL? If that's your plan, and if you do want to realize the real power of Layout XL, Colin Thomson (Product Engineering Architect, CPG) has captured some very useful insights in his new RAK that runs you through the steps to get this transition right. Read along to know some more about the RAK, how to access it, and why Layout XL-compliance matters at all...(read more)![]()
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Virtuosity: Exploring Histories
OK we heard you, you want to be able to specify Virtuoso ADE Explorer history names before simulation and you want these histories to increment just like they do in Virtuoso ADE Assembler, right? Let's look at how to do this.(read more)![]()
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Virtuosity: What's New in Run plan – Part I
The Run Plan assistant in Virtuoso ADE Assembler has proved to be one of the most popular features. It provides the capability to create multiple variations of the setup within a single session, each of these runs has their own setup details that override the settings in the active setup. Simulations can be run for all the runs defined in the run plan with a single click. If there are no dependencies, the results are generated simultaneously.
The different runs in the run plans can vary in terms of tests, analyses, simulation options, variables, corners or they can even run different run modes. Let us see the enhancements that have been made to run plan in IC6.1.7 ISR15 and ICADV12.3 ISR15 releases.(read more)![]()
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Virtuosity: What's New in Run Plan – Part II
The Run Plan assistant in Virtuoso ADE Assembler has proved to be one of the most popular features. It provides the capability to create multiple variations of the setup within a single session, each of these runs has their own setup details that override the settings in the active setup. Simulations can be run for all the runs defined in the run plan with a single click. If there are no dependencies, the results are generated simultaneously.
The different runs in the run plans can vary in terms of tests, analyses, simulation options, variables, corners or they can even run different run modes. Let us see the enhancements that have been made to run plan in IC6.1.7 ISR15 and ICADV12.3 ISR15 releases.(read more)![]()
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Virtuoso Video Diary: Bridging Virtuoso and Mixed-Signal Simulation Tools Using CLIPS
Cadence has introduced Command-Line IP Selector (CLIPS) support to provide a bridge between Virtuoso—a UI-based, analog, and mixed-signal design environment—and other command-line, digital, and mixed-signal simulation tools and flows that use a text-based setup. CLIPS can be used to import an AMS IP into an existing digital-centric verification setup.(read more)![]()
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Virtuosity: How to Run a Multi-Technology Simulation (MTS)?
Are you looking for some hands-on experience with running multi-technology simulation in Virtuoso ADE Explorer and Virtuoso ADE Assembler?
In today’s fast-shrinking technology, we often have situations where we need to design custom IC system-in-packages (SiP). But, here comes the challenge – how to design these ICs using different technologies in a single design environment and analyze their responses when there are library name collisions along with the model name collisions.(read more)![]()
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Virtuoso Video Diary: Stranded Wire – A New Sapling in Interactive Routing
In order to drive high current and to minimize routing resistivity, it is desirable to draw wide wires. But, in mature nodes, maximum width or maximum density constraints on some metal layers prevent the designers to create wide wires. Another challenge when working with designs at advanced nodes less than 22nm is that it is only possible to route with wires at minimum width. This leads to situations where the current density or the max resistivity cannot be met.
A solution to this is: Stranded Wire
What is a Stranded Wire?
To describe stranded wire in layman's language:
Stranded Wire is composed of a number of small wires bundled or wrapped together to form a larger conductor. See the figure below.
So, in interactive routing, stranded wire is an easy way to create multiple wires at the same time on same net with built-in features to control resistance and metal density. The stranded wire feature is available in Layout XL, GXL, and EAD tiers and was introduced in the IC6.1.7 and ICADV 12.3 ISR9 releases. To access the Create Stranded Wire command, choose Create – Wiring – Stranded Wire.
A stranded wire can be created from the following starting points:
- An empty space
- An existing single pin
- An existing wire or via
- An existing width spacing pattern
You can create the following kind of structure by using the Create Stranded Wire command.
New Videos
Did you know that we retain only 10% of what we read and 95% of what we see?
Therefore, to help you understand and get started with the Stranded Wire new features easily, we bring to you some interesting and informative videos on this topic.
Stranded Wire Support in Virtuoso and Virtuoso Advanced Nodes
This video demonstrates the basic features and bindkey controls of stranded wire.
- What is a stranded wire?
- Why do we need a stranded wire in Layout?
- How to create a stranded wire in Virtuoso layout?
- What are the stranded wire bindkey controls?
- How to terminate a stranded wire?
Stranded Wire Additional Editing Features
This video demonstrates the following editing features of stranded wire.
- Inserting Vias Automatically on Pins and Overlaps
- Using the Stranded Wire Context-sensitive Menu
- Tapering in Stranded Wire
- Creating a Stranded Wire from Tieout
Stranded Wire Advanced Node Editing Features
This video demonstrates the following editing features of stranded wire for advanced nodes.
- WSP Support in Stranded Wire
- Automatic Via Insertion at Bends
- Blockage Avoidance
- Interactive Coloring in Stranded Wire
Related Resources
Virtuoso Space-based Router User Guide
Virtuoso Layout Suite SKILL Reference
Environment Variables
Note: For more information on Cadence circuit design products and services, visit www.cadence.com.
About Virtuoso Video Diary
Virtuoso Video Diary is an online journal that relays information about Virtuoso videos that are available in the Cadence Online Support Video Library. Hundreds of interesting videos on a wide variety of new and exciting Virtuoso features have already been created. Virtuoso Video Diary brings you direct links to these videos and other related material, on regular basis. Click Subscribe to visit the Subscription box at the top of the page in which you can submit your e-mail address to receive notifications about our latest Video Diary posts.
Happy Reading!
Parul Agarwal
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Virtuoso Video Diary: Self-Paced Learning through Training Bytes
Cadence Education Services offers several online training courses and training bytes addressing specific features of Virtuoso products. This blog gives you a brief overview about how to find them and enroll.(read more)![]()
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Virtuosity: New Eye Diagram Measurements
The Eye Diagram assistant in Virtuoso Visualization and Analysis allows you to create eye diagrams, add masks and also calculate some standard measurements. The measurements have recently been enhanced by adding more jitter calculations, maximum eye height and width calculations, level annotations and Bit Error Rate (BER) curves.(read more)![]()
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Virtuosity: Do I Need To Run a Simulation To Plot From a Text File?
You'll be glad to hear the answer is No! In Virtuoso Visualization and Analysis, we have a Calculator function available called getAsciiWave, which will create a plot from your text file without the need to create a schematic or a testbench, or run simulation. Let's see how easy it is with the help of an example.(read more)![]()
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Virtuosity: Exploring Histories
OK we heard you, you want to be able to specify Virtuoso ADE Explorer history names before simulation and you want these histories to increment just like they do in Virtuoso ADE Assembler, right? Let's look at how to do this.(read more)![]()
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Virtuoso IC6.1.7 ISR20 and ICADV12.3 ISR20 Now Available
The IC6.1.7 ISR20 and ICADV12.3 ISR20 production releases are now available for download. To find out more, click here…(read more)![]()
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Virtuosity: Let's Have Fun with ADE Debugging – Part 1
Over the years, we have seen our customers’ usage of ICRPs increase dramatically. It is now quite common to run 1000s of simulation points using 100s of ICRPs. And as this usage has increased, one of the challenges that has emerged is how to debug issues with ICRPs and job distribution, which is the topic of my write-up. So, what is it that I’m trying to address? Does the following sound familiar?
User hits green button in ADE, expects simulations to run and see results.
However, no simulation is starting. Why?
Or, one or more simulations fail, or, one or more measurements fail. User wants to find out what happened?
Or, things are running, but seem to take an excessive amount of time (usually not the actual simulation time, but rather setup time or time to obtain results).
How can we debug what’s wrong?
The objective of these slides is to equip everyone with a baseline set of tools and information to be used when investigating issues in ADE. These slides can serve as a very good reference material when faced with job distribution issues in ADE. Through this and my future blogs on debugging, I’ll attempt to use the tools and recipes from the slides and apply these to real life situations.(read more)![]()
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