While most of us would like our electronic gadgets to last forever, the reality is that these gadgets have a lifetime. Most of the time, the lifetime of devices is limited by either mechanical (switch, relay), or thermal (fuse, capacitor) failures. However, as microchips designed in advanced technologies become more pervasive, the lifetime of microchips has become an additional issue.
Several effects contribute to device aging. Some effects, such as electromigration and Time-Dependent Dielectric Breakdown (TDDB) cause a sudden failure, while other effects, such as Hot Carrier injection (HCI) and Bias Temperature Instability (BTI), continuously degrade the performance with time.
As process feature sizes have scaled down, analyzing device reliability has become more complex as more and more phenomena contribute to the change in device characteristics. This is shown in the figure below.
There is one additional phenomenon (not shown in the figure), Time-Dependent Dielectric Breakdown (TDDB), which has impacted designers since the days of high-voltage linear analog. However, traditional CMOS process scaling rules helped avoid this issue until advanced node processes.
HCI Effect
HCI re-emerged as an issue as CMOS transistors scaled down into the deep submicron region. At shorter gate lengths, the electric field increases because power supply voltages don’t scale as fast as gate length scales down. The higher electric field in the channel leads to impact ionization collisions of electrons flow in the channel with the atoms in the lattice. These collisions generate hot electrons. Some of the hot electrons get trapped in the gate oxide. Electrons in the oxide increase the device threshold voltage and reduce mobility of electrons in the channel.
NBTI Effect
Negative Bias Temperature Instability (NBTI) occurs when positive carriers get trapped at oxide/silicon interface or in the oxide due to electrical stress when the voltage across the gate-source junction is negative. This effect is temperature dependent. NBTI is primarily an issue for PMOS transistors. The effect of NBTI increases when nitrogen is added to the oxide to reduce gate leakage current since less energy is required to create trap sites. Unlike HCI, which occurs gradually, NBTI has a more immediate impact. In addition, a partial recovery from NBTI can occur when electrical stress is removed and/or temperature drops. The NBTI is reversible when it happens in the bulk of the device, but it is permanent when the trapping occurs at the interface.
PBTI Efffect
Positive Bias Temperature Instability (PBTI) has become an issue with the adoption of Metal Gate High-K gate-stack technologies. NMOS transistors experience PBTI whose impact is temperature dependent. Unlike NBTI, interface traps are not created; therefore, full recovery is possible when the electrical stress is removed and/or temperature is lowered.
Spectre Native Reliability Analysis
You can use the Native Reliability feature of Spectre® to perform reliability analysis and address these effects with ease.
To perform reliability analysis, a prerequisite aging model should be available from the foundry. Some foundries use the Spectre® AgeMOS built-in model for Aging, while others use their proprietary model libraries to calculate the aging degradation for transistors.
Spectre® performs reliability analysis in two steps:
- In the first step, Spectre simulates the stress over the transistors and calculates the degradation based on the results of this simulation.
- In the second step, Spectre applies the degradation on the transistors to simulate the behavior of the circuit after the defined aging years.
Below is an example of a simple reliability statement to analyze the behavior of the circuit after 10 years of operation.
rel reliability {
age time=[10.0000y]
accuracy level=1
// Stress simulation
tran_stress tran stop=10u annotate=status
// Aged simulation
tran_aged tran stop=10u annotate=status
}
Related Resources
- Spectre Classic Simulator, Spectre Accelerated Parallel Simulator (APS), and Spectre Extensive Partitioning Simulator (XPS) User Guide
- Spectre RelXpert Reliability Simulation User Guide
You may also contact your Cadence support AE for guidance.
For more information on Cadence products and services, visit www.cadence.com.
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